Keyword: asynchronous circuits

• Yakovlev, Alex; Furber, Steve; Krenz, René; Bystrov, Alexandre:
  Design and Analysis of a Self-Timed Duplex Communication System. 2004.

• Khomenko, Victor; Koutny, Maciej; Yakovlev, Alex:
  Logic Synthesis for Asynchronous Circuits Based on Petri Net Unfoldings and Incremental SAT. 2004.

• Khomenko, Victor; Koutny, Maciej; Yakovlev, Alex:
  Detecting State Coding Conflicts in STG Unfoldings Using SAT. 2003.

• Cortadella, J.; Kishinevsky, M.; Kondratyev, A.; Lavagno, L.; Yakovlev, A.:
  Logic synthesis of asynchronous controllers and interfaces. 2002.

• Schwiegelshohn, U.; Thiele, L.:
  Properties of change diagrams. 2000.

• Wollowski, R.; Beister, J.:
  Comprehensive causal specification of asynchronous controller and arbiter behaviour. 2000.

• Chung, S.-H.; Farber, S.B.:
  The design of the control circuit for an asynchronous instruction prefetch unit using signal transition graphs. 1999.

• Wollowski, R.; Beister, J.:
  Comprehensive causal specification of asynchronous circuit behavior: a generalized STG. 1999.

• Xie, Aiguo; Beerel, Peter A.:
  Performance analysis of asynchronous circuits and systems using stochastic timed Petri nets. 1999.

• Yoneda, T.; Zhou, B.; Schlingloff, B.-H.:
  Verification of bounded delay asynchronous circuits with timed traces. 1999.

• Pastor, E.; Cortadella, J.; Kondratyev, A.; Roig, O.:
  Structural methods for the synthesis of speed-independent circuits. 1998.

• Yakovlev, A.:
  Designing Control Logic for Counterflow Pipeline Processor Using Petri Nets. 1998.

• Semenov, A.; Koelmans, A.M.; Lloyd, L.; Yakovlev, A.:
  Designing an Asynchronous Processor Using Petri Nets. 1997.

• Cortadella, J.; Kishinevsky, M.; Kondratyev, A.; Lavagno, L.; Yakovlev, A.:
  Petrify: a tool for manipulating concurrent specifications and synthesis of asynchronous controllers. 1997.

• Yakovlev, A.; Koelmans, A.M.; Semenov, A.; Kinniment, D.J.:
  Modelling, Analysis and Synthesis of Asynchronous Control Circuits Using Petri Nets. 1996.

• Yakovlev, A.; Kishinevsky, M.; Kondratyev, A.; Lavagno, L.; Pietkiewicz-Koutny, M.:
  On the Models for Asynchronous Circuit Behaviour with OR Causality. 1996.

• Yakovlev, A.; Lavagno, L.; Sangiovanni-Vincentelli, A.:
  A unified signal transition graph model for asynchronous control circuit synthesis. 1996.

• Miyamoto, T.; Lee, D.-I.; Kumagai, S.:
  An efficient state space search for the synthesis of asynchronous circuits by subspace construction. 1995.

• Yakovlev, A.; Koelmans, A.; Lavagno, L.:
  High level modelling and design of asynchronous interface logic. 1995.

• Rosenblum, L.Ya.; Yakovlev, A.V.; Yakovlev, V.B.:
  A look at concurrency semantics through `lattice glasses'. 1989.

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