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Yakovlev, A.
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Cortadella, Jordi;
Gorgônio, Kyller;
Xia, Fei;
Yakovlev, Alex:
Automating Synthesis of Asynchronous Communication Mechanisms.
2005.
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Yakovlev, Alex;
Furber, Steve;
Krenz, René;
Bystrov, Alexandre:
Design and Analysis of a Self-Timed Duplex Communication System.
2004.
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Carmona, Josep;
Cortadella, Jordi;
Khomenko, Victor;
Yakovlev, Alex:
Synthesis of Asynchronous Hardware from Petri Nets.
2004.
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Khomenko, Victor;
Koutny, Maciej;
Yakovlev, Alex:
Logic Synthesis for Asynchronous Circuits Based on Petri Net Unfoldings and Incremental SAT.
2004.
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Renaudin, M.;
Yakovlev, A.:
From Hardware Processes to Asynchronous Circuits via Petri nets: an Application to Arbiter Design.
2004.
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Khomenko, Victor;
Koutny, Maciej;
Yakovlev, Alex:
Detecting State Coding Conflicts in STG Unfoldings Using SAT.
2003.
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Cortadella, J.;
Kishinevsky, M.;
Kondratyev, A.;
Lavagno, L.;
Yakovlev, A.:
Logic synthesis of asynchronous controllers and interfaces.
2002.
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Yakovlev, Alex:
Is the Die Cast for the Token Game?.
2002.
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Cortadella, Jordi;
Kishinevsky, Michael;
Kondratyev, Alex;
Lavagno, Luciano;
Yakovlev, Alex:
Hardware and Petri Nets: Application to Asynchronous Circuit Design.
2000.
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Madalinski, A.;
Bystrov, A.;
Yakovlev, A.:
Statistical fairness of ordered arbiters.
2000.
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Burns, A.;
Wellings, A.J.;
Burns, F.;
Koelmans, A.M.;
Koutny, M.;
Romanovsky, A.;
Yakovlev, A.:
Towards Modelling and Verification of Concurrent Ada Programs Using Petri Nets.
2000.
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Saito, H.;
Kondratyev, A.;
Cortadella, J.;
Lavagno, L.;
Yakovlev, A.:
What is the cost of delay insensitivity?.
1999.
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Burns, Frank;
Koelmans, Albert;
Yakovlev, Alexandre:
Modelling of Superscala Processor Architectures with Design/CPN.
1998.
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Cortadella, J.;
Kishinevsky, M.;
Lavagno, L.;
Yakovlev, A.:
Deriving Petri nets from finite transition systems.
1998.
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Kondratyev, A.;
Cortadella, J.;
Kishinevsky, M.;
Lavagno, L.;
Taubin, A.;
Yakovlev, A.:
Identifying state coding conflicts in asynchronous system specification using Petri net unfoldings.
1998.
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Vogler, W.;
Semenov, A.;
Yakovlev, A.:
Unfolding and finite prefix for nets with read arcs.
1998.
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Yakovlev, A.:
Designing Control Logic for Counterflow Pipeline Processor Using Petri Nets.
1998.
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Semenov, A.;
Koelmans, A.M.;
Lloyd, L.;
Yakovlev, A.:
Designing an Asynchronous Processor Using Petri Nets.
1997.
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Kishinevsky, Michael;
Cortadella, Jordi;
Kondratyev, Alex;
Lavagno, Luciano;
Taubin, Alexander;
Yakovlev, Alex:
Coupling Asynchrony and Interrupts: Place Chart Nets.
1997.
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Cortadella, J.;
Kishinevsky, M.;
Kondratyev, A.;
Lavagno, L.;
Yakovlev, A.:
Petrify: a tool for manipulating concurrent specifications and synthesis of asynchronous controllers.
1997.
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Semenov, Alexei;
Yakovlev, Alex:
Verification of Asynchronous Circuits using Time Petri-Net Unfolding.
1996.
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Yakovlev, A.;
Koelmans, A.M.;
Semenov, A.;
Kinniment, D.J.:
Modelling, Analysis and Synthesis of Asynchronous Control Circuits Using Petri Nets.
1996.
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Yakovlev, A.;
Kishinevsky, M.;
Kondratyev, A.;
Lavagno, L.;
Pietkiewicz-Koutny, M.:
On the Models for Asynchronous Circuit Behaviour with OR Causality.
1996.
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Yakovlev, A.;
Lavagno, L.;
Sangiovanni-Vincentelli, A.:
A unified signal transition graph model for asynchronous control circuit synthesis.
1996.
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Cortadella, J.;
Kishinevsky, M.;
Lavagno, L.;
Yakovlev, A.:
Synthesizing Petri Nets from State-Based Models.
1995.
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Yakovlev, A.;
Koelmans, A.;
Lavagno, L.:
High level modelling and design of asynchronous interface logic.
1995.
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Yakovlev, A.;
Kishinevsky, M.;
Kondratyev, A.;
Lavagno, L.:
OR Causality: Modelling and Hardware Implementation.
1994.
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Yakovlev, Alexandre;
Petrov, Alexei:
Petri Nets and Parallel Bus Controller Design.
1990.
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