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Lavagno, L.
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Cortadella, Jordi;
Kondratyev, Alex;
Lavagno, Luciano;
Watanabe, Yosinori:
Quasi-Static Scheduling for Concurrent Architectures.
2003.
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Cortadella, J.;
Kishinevsky, M.;
Kondratyev, A.;
Lavagno, L.;
Yakovlev, A.:
Logic synthesis of asynchronous controllers and interfaces.
2002.
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Balarin, Felice;
Lavagno, Luciano;
Passerone, Claudio;
Sangiovanni-Vincentelli, Alberto;
Sgroi, Marco;
Watanabe, Yosinori:
Modeling and Designing Heterogeneous Systems.
2002.
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Cortadella, Jordi;
Kondratyev, Alex;
Lavagno, Luciano;
Passerone, Claudio;
Watanabe, Yosinori:
Quasi-Static Scheduling of Independent Tasks for Reactive Systems.
2002.
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Cortadella, Jordi;
Kishinevsky, Michael;
Kondratyev, Alex;
Lavagno, Luciano;
Yakovlev, Alex:
Hardware and Petri Nets: Application to Asynchronous Circuit Design.
2000.
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Blunno, I.;
Lavagno, L.:
Deriving signal transition graphs from behavioral Verilog HDL.
1999.
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Saito, H.;
Kondratyev, A.;
Cortadella, J.;
Lavagno, L.;
Yakovlev, A.:
What is the cost of delay insensitivity?.
1999.
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Sgroi, Marco;
Lavagno, Luciano;
Watanabe, Yosinori;
Sanglovanni-Vincentelli, Alberto:
Quasi-Static Scheduling of Embedded Software Using Equal Conflict Nets.
1999.
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Cortadella, J.;
Kishinevsky, M.;
Lavagno, L.;
Yakovlev, A.:
Deriving Petri nets from finite transition systems.
1998.
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Kondratyev, A.;
Cortadella, J.;
Kishinevsky, M.;
Lavagno, L.;
Taubin, A.;
Yakovlev, A.:
Identifying state coding conflicts in asynchronous system specification using Petri net unfoldings.
1998.
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Kishinevsky, Michael;
Cortadella, Jordi;
Kondratyev, Alex;
Lavagno, Luciano;
Taubin, Alexander;
Yakovlev, Alex:
Coupling Asynchrony and Interrupts: Place Chart Nets.
1997.
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Escalante, M.A.;
Lavagno, L.;
Dimopoulos, N.:
Performance Analysis of an Arbiter using Probabilistic Timed Petri Nets.
1997.
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Cortadella, J.;
Kishinevsky, M.;
Kondratyev, A.;
Lavagno, L.;
Yakovlev, A.:
Petrify: a tool for manipulating concurrent specifications and synthesis of asynchronous controllers.
1997.
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Yakovlev, A.;
Kishinevsky, M.;
Kondratyev, A.;
Lavagno, L.;
Pietkiewicz-Koutny, M.:
On the Models for Asynchronous Circuit Behaviour with OR Causality.
1996.
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Yakovlev, A.;
Lavagno, L.;
Sangiovanni-Vincentelli, A.:
A unified signal transition graph model for asynchronous control circuit synthesis.
1996.
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Cortadella, J.;
Kishinevsky, M.;
Lavagno, L.;
Yakovlev, A.:
Synthesizing Petri Nets from State-Based Models.
1995.
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Yakovlev, A.;
Koelmans, A.;
Lavagno, L.:
High level modelling and design of asynchronous interface logic.
1995.
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Yakovlev, A.;
Kishinevsky, M.;
Kondratyev, A.;
Lavagno, L.:
OR Causality: Modelling and Hardware Implementation.
1994.
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