In: Computer Architecture News, Vol. 18, No. 4, pages 67-77. 1990.
Abstract: In spite of their increasing popularity for modeling and performance analysis of parallel systems, Petri nets play only a marginal role in the area of synthesis of asynchronous hardware. It is suggested that a change in the perception of their role will lead to a cost effective design method for parallel asynchronous architectures. A hardware implentable subclass of Petri nets is presented that exploits conflicts as a nondeterministic scheduling feature and that offers token evalution as an option for path selection. The net primitives, complemented with functional primitives, constitute the lowest abstractions for a data flow oriented design paradigm.
Keywords: (nets as) design abstraction (for) parallel architectures; cost effective design method; nondeterministic scheduling; data flow (oriented) design paradigm; VLSI circuit.