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Dimopoulos, N.J.
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Escalante, Marco A.;
Dimopoulos, Nikitas J.:
Modeling Timing Correlation and the Accurate Timing Verification of Digital Interface Circuits.
1996.
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Escalante, Marco A.;
Dimopoulos, Nikitas J.:
A Probabilistic Timing Analysis for Synthesis in Microprocessor Interface Design.
1995.
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Escalante, Marco A.;
Dimopoulos, Nikitas J.;
Gurov, D.;
Muller, H.:
Timing Analysis for Synthesis of Hardware Interface Designs using Timing Signal Transition Graphs.
1995.
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Escalante, Marco A.;
Dimopoulos, Nikitas J.:
Assessing the Feasibility of Interface Designs before their Implementation.
1995.
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Escalante, Marco A.;
Dimopoulos, Nikitas J.:
Timing analysis for synthesis in microprocessor interface design.
1994.
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Escalante, Marco A.;
Dimopoulos, N. J.:
Timed Asynchronous Interface Design in Microprocessor-based Systems.
1993.
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